Sema: fix else case code generation for switch

stage2: clean up RangeSet and fix swapped Sema switch logic for lhs/rhs

Sema: implement switch validation for ranges

AstGen: improve switch expressions

AstGen: switch expressions properly handle result locations

stage2: rework AstGen for switch expressions

Sema: implement switch expressions

stage2: guidance on how to implement switch expressions

Merge remote-tracking branch 'origin/master' into zir-memory-layout

stage2: fix error sets

stage2: implement sema for @errorToInt and @intToError

AstGen: pass *GenZir as the first arg, not *Module

translate-c: fix typo made in prior commit

AstGen: scope result location related functions

stage2: rename WipZirCode => AstGen, astgen.zig => AstGen.zig

stage2: fully implement Type.eql for pointers

stage2: enable passing tests

stage2: implement bitwise expr and error literals

stage2: implement source location: .node_offset_var_decl_ty

astgen: fix continue expressions

astgen: fix result location for sliced objects

astgen: implement float literals

astgen: implement more builtin functions

astgen: implement slicing

stage2: improve source locations of Decl access

stage2: fix `@compileLog`.

astgen: fix var decl source locations

astgen: fix for loop expressions

astgen: fix array access

stage2: implement inline while

stage2: enable passing tests

stage2: clean up break / noreturn astgen

stage2: add block test cases llvm backend

astgen: implement breaking from a block

stage2: cleanups from previous commits

stage2: add passing optional test case in LLVM backend

astgen: implement orelse

stage2: fix memory leak when updating a function

stage2: further cleanups regarding zir.Inst.Ref

stage2: make zir.Inst.Ref a non-exhaustive enum

stage2: comment out failing test cases; implement more things

stage2: fix while loops

astgen: fixups regarding var decls and rl_ptr

stage2: implement inttype ZIR

astgen: finishThenElseBlock: fix putting store_to_block_ptr in wrong block

stage2: fix comptimeExpr and comptime function calls

stage2: add helper functions to clean up astgen Ref/Index

Sema: use correct LazySrcLoc for resolvePeerTypes

astgen: implement typeof

astgen: fix an issue where the alloc wasnt elided

stage2: handle void value in genRet in LLVM backend

stage2: rename fail to todo in LLVM backend

stage2: fix two return types to be Ref not Index

astgen: implement assign operations

stage2: fix `if` expressions

astgen: improve the ensure_unused_result elision

stage2: Sema improvements and boolean logic astgen

stage2: remove all async related code

fix calculation in ensureCapacity

astgen: implement pointer types

astgen: implement array types

cleanups from previous commit

zir-memory-layout: astgen: varDecl

Sema: implement arithmetic

Sema: no explicit coercion needed for inline asm args

astgen: implement bool_and/bool_or

astgen: implement simple binary operators

zir: add negate/negate_wrap, implement astgen

astgen: fix not detecting volatile asm

stage2: fix memory management of ZIR code

astgen: implement string literals

astgen: implement inline assembly

ZIR: move some un_tok tags to un_node instead

astgen: implement function calls

zir-memory-layout: remove all absolute src consts

zir-memory-layout: astgen: more instructions

stage2: restructure LLVM backend

astgen: support blocks

stage2: first pass at repairing ZIR printing

Sema: allocate inst_map with arena where appropriate

stage2: fix some math oopsies and typos

stage2: fix export source locations not being relative to Decl

zir-memory-layout: astgen: literals and *, &

llvm backend: use new srcloc

zir-memory-layout: astgen: fill in identifier

stage2: codegen: update asm IR to new names

stage2: the code is compiling again

stage2: get Module and Sema compiling again

Merge remote-tracking branch 'origin/master' into zir-memory-layout

stage2: Module and Sema are compiling again

stage2: work through some compile errors in Module and Sema

zir-memory-layout: fix @setEvalBranchQuota

stage2: rename zir_sema.zig to Sema.zig

stage2: *WIP*: rework ZIR memory layout; overhaul source locations

std: support optional getaddrinfo arguments

Add test for multi-line while cont expr with same-line then expr

zig fmt: simplify and improve consistency of if/for/while handling

zig fmt: fix extra newline before if nested in for

macho: fix various linker flags

std: Replace testing fns for floating-point values