Implement delay/Later<Clock,T> guarded feedback typing per D-095

Add checked if/match statements, generalize linear reconciliation to N arms

Add D-095: guarded feedback (delay/Later<Clock,T>) design decision

Implement grade-1 linearity checking per D-094

Add D-094: v0 linearity design decision

Implement grade-0 (ghost) erasure checking per D-093

Rework FIFO/CDC fixtures for D-092's one-cycle mem read latency

Add D-093: v0 usage grade system design decision

Implement mem v0 per D-092, with enforced read-latency semantics

Add D-092: mem memory-model design decision

Add expected-type literal inference, body const generics, Local lowering

Ignore wasm outputs

Wire strata-ls into the Zed reference extension

Add strata-ls Tier A: a real LSP server over stdio

Add a real two-domain CDC bridge to the corpus, fix domain-labeled bools

Add minimal CDC unbridged-domain-crossing check

Add FIFO fixture and CDC/width/reset bug-rejection corpus

Pin zed-extension grammar rev to the pushed grammar-fix commit

Add strata lint v0, close tree-sitter corpus gaps, add Zed extension

Add proposal docs in

Add per-cycle simulation stimulus

Widen architectural expressions and simulation inputs

Widen the Phase 1 package and output foundations

Expose the Phase 1 compiler vertical slice

Prove and implement the CIRCT lowering boundary

Complete typed Counter semantic pipeline

Complete deterministic source formatter tranche

no github remove ci + add node modules to ignore

Establish slice-0 frontend and checker foundation

strata-cli shell, strata-diag/0 schema, xtask CI harness

strata workspace scaffold: syntax + cli crates per roadmap phase 0/1