# Rework FIFO/CDC fixtures for D-092's one-cycle mem read latency · versecafe/strata [View on GitCafe](https://git.cafe/versecafe/strata/commit/5fb00970716bc51374501a76d6d4080f218142c3) Repository: [versecafe/strata](https://git.cafe/versecafe/strata) Visibility: public Requested revision: 5fb00970716bc51374501a76d6d4080f218142c3 Requested commit: 5fb00970716bc51374501a76d6d4080f218142c3 Commit: 5fb00970716bc51374501a76d6d4080f218142c3 Tree: 4d678ac57ffbea371ba3b92b5a576fdf8e61a0aa Author: versecafe Committer: versecafe ## Message ``` Rework FIFO/CDC fixtures for D-092's one-cycle mem read latency fifo.strata and cdc_bridge.strata were written before mem had real semantics and assumed same-cycle (combinational) reads, which D-092 §2 predicted would need fixing once mem timing was enforced (7a7a154). Both now use the standard look-ahead (skid) FIFO pattern: a fetch pointer presents the read address to buf, and the registered result lands in a head/head_valid pair via <- only, never combinationally. fifo.strata gains reg head/head_valid/mem_count; cdc_bridge.strata's 'dst domain gets the same treatment (rd_gray_fetch decoupled from rd_gray, which only advances on actual consumption). The 'src domain was untouched — it never had a same-cycle-read problem. epoch_soc.strata needed the same fix too: D-092 §2 predicted its TxnTable.lookup was safe because it reads in a separate port call from the alloc write, but that call itself returned entries[slot] combinationally within the same lookup — the same violation shape, just not aliased with a concurrent write. Fixed with a registered lookup_result, D-092's own optimism corrected rather than left stale. New crates/strata-cli/tests/fixtures/mem-read-ahead.strata isolates the read-ahead register shape into the phase-1 checked-body algebra (no generics/contract/handshake) and proves it directly: strata check reports zero diagnostics, strata compile lowers the registered mem read through a fetch_enable mux into a real seq.firreg, with no path from mem to output that skips the register. Co-Authored-By: Claude Sonnet 5 ``` ## Parents - [596445afea8642bb9f8858aaae0e14a0d2d30061](https://git.cafe/versecafe/strata/commit/596445afea8642bb9f8858aaae0e14a0d2d30061?format=markdown) [Source at this commit](https://git.cafe/versecafe/strata/tree/5fb00970716bc51374501a76d6d4080f218142c3?format=markdown)