stage2: fix scanDecls not advancing the field bits
d36a31ba75 • Andrew Kelley • Apr 29, 2021
std: remove redundant comptime keyword
c60d8f017e • Andrew Kelley • Apr 29, 2021
stage2: implement semantic analysis for functions and global vars
0c71d2fdc1 • Andrew Kelley • Apr 29, 2021
stage2: prepare for mainining Decl references to ZIR indexes
3462193d30 • Andrew Kelley • Apr 28, 2021
stage2: semaDecl properly analyzes the decl block
f86469bc5e • Andrew Kelley • Apr 28, 2021
Sema: do not analyze test decls when not in test mode
fa6bb4b662 • Andrew Kelley • Apr 28, 2021
stage2: implement #8364
2354cbafdb • jacob gw • Apr 28, 2021
std: remove redundant `comptime const`
c90e52b74c • Andrew Kelley • Apr 28, 2021
AstGen: hook up hex float parsing to float literals
d3ffacb55c • Andrew Kelley • Apr 28, 2021
AstGen: function prototypes can have alignment
9db5b2c5c6 • Andrew Kelley • Apr 28, 2021
Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
df24ce52b1 • Andrew Kelley • Apr 28, 2021
AstGen: fix function src hash not including body
eb9c29eb81 • Andrew Kelley • Apr 28, 2021
link: fix compile error from previous commit
3d9e4edb57 • Andrew Kelley • Apr 27, 2021
stage2: rewire the frontend driver to whole-file-zir
bfded492f0 • Andrew Kelley • Apr 27, 2021
AstGen: improved handling of declarations
91c317bb9a • Andrew Kelley • Apr 27, 2021
AstGen: implement opaque decls
646eb1fa93 • Andrew Kelley • Apr 26, 2021
stage2: pre-open ZIR cache dir handles
56226449d2 • Andrew Kelley • Apr 25, 2021
stage2: implement caching for ZIR code
015cd79f89 • Andrew Kelley • Apr 25, 2021
AstGen: implement `@Vector`
ff2ec0dc5a • Andrew Kelley • Apr 25, 2021
stage2: move overflow builtin ZIR instructions to Extended
e018e64a53 • Andrew Kelley • Apr 25, 2021
AstGen: parser ensures all suspend have blocks
15e891823e • Andrew Kelley • Apr 24, 2021
AstGen: implement await and resume
1592206965 • Andrew Kelley • Apr 24, 2021
Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
e86cee258c • Andrew Kelley • Apr 24, 2021
stage2: better error reporting for LazySrcLoc.entire_file
224fbb23c4 • Andrew Kelley • Apr 24, 2021
AstGen: support struct init with ref result location
27fa4bc2be • Andrew Kelley • Apr 24, 2021
stage2: remove call_none and call_none_chkused ZIR
d2b06c2612 • Andrew Kelley • Apr 24, 2021
stage2: remove dead ZIR instructions
6b98384e20 • Andrew Kelley • Apr 24, 2021
AstGen: emit nosuspend function calls
fbfae832ea • Andrew Kelley • Apr 24, 2021
AstGen: implement nosuspend expressions
49be88859d • Andrew Kelley • Apr 24, 2021
AstGen: implement suspend blocks
9a271347fe • Andrew Kelley • Apr 24, 2021
stage2: implement `anyframe`, `anyframe->T` and fix assembly
b40a8efb9a • Andrew Kelley • Apr 24, 2021
AstGen: compile error for unable to infer array size
183ee0965f • Andrew Kelley • Apr 23, 2021
std: remove `comptime const`
0262dda9b8 • Andrew Kelley • Apr 23, 2021
AstGen: implement integers bigger than u64
715abe8ebe • Andrew Kelley • Apr 23, 2021
stage2: write out builtin.zig before spawning AstGen tasks
2d290d6f82 • Andrew Kelley • Apr 23, 2021
ZIR: fix text printing of field_ptr_type
a830ebe718 • Andrew Kelley • Apr 23, 2021
stage2: fix builtin.zig for `zig test`
8df4bb7c96 • Andrew Kelley • Apr 23, 2021
std: fix potential bug in parseInt
ce41ddcd23 • jacob gw • Apr 23, 2021
std: fix compile errors caught by stage2 AstGen
93d1c2d6d4 • Andrew Kelley • Apr 23, 2021
delete packed enums from the language
8dd7378013 • Andrew Kelley • Apr 23, 2021
AstGen: implement align and linksection on globals
329a359974 • Andrew Kelley • Apr 23, 2021
std: fix compile errors caught by stage2 AstGen
507a8096d2 • Andrew Kelley • Apr 23, 2021
AstGen: implement `@extern` builtin
7c453b91b8 • Andrew Kelley • Apr 22, 2021
AstGen: fix `@export`
3d637e6dd2 • Andrew Kelley • Apr 22, 2021
AstGen: implement function prototypes
130ad08001 • Andrew Kelley • Apr 22, 2021
AstGen: implement alignment on locals
389020009a • Andrew Kelley • Apr 22, 2021
AstGen: implement comptime locals
ea00ddfe37 • Andrew Kelley • Apr 22, 2021
AstGen: fix switch result location elision
8ee0cbe50a • Andrew Kelley • Apr 22, 2021
AstGen: implement `@bitCast` for other result location types
570ed7b3bf • Andrew Kelley • Apr 22, 2021
AstGen: fix `@floatCast` having wrong arity
4cfea2fbd5 • Andrew Kelley • Apr 22, 2021
AstGen: slightly better eager-allocating heuristic
d10ec6e70d • Andrew Kelley • Apr 21, 2021
AstGen: implement union decls
a1ac2b95bb • Andrew Kelley • Apr 21, 2021
AstGen: implement size zero inferred length arrays
971f3d95f9 • Andrew Kelley • Apr 21, 2021
AstGen: fix store_to_block_ptr elision for switch statements
c69a95f64b • Andrew Kelley • Apr 21, 2021
std.fs: delete unused label
a008fb0a71 • Andrew Kelley • Apr 21, 2021
AstGen: implement for loop payload
e9477048e5 • Andrew Kelley • Apr 21, 2021
AstGen: implement anytype parameters
30c9808391 • Andrew Kelley • Apr 21, 2021
AstGen: implement defer for `break`
a62db38d90 • Andrew Kelley • Apr 21, 2021
AstGen: implement defer for `continue`
458c4b6fc6 • Andrew Kelley • Apr 21, 2021
AstGen: basic defer implementation
a59bcae59f • Andrew Kelley • Apr 21, 2021
stage2: make std.fmt.parseInt ignore `_`
b4aec0e31d • jacob gw • Apr 20, 2021
stage2: fix compile error in codegen
6b944492b5 • jacob gw • Apr 20, 2021
AstGen: `try` fixups
b4baa9eda2 • Andrew Kelley • Apr 20, 2021
stage2: astgen `try`
ee3c1c763c • jacob gw • Apr 20, 2021
AstGen: implement array initialization expressions
e315120b79 • Andrew Kelley • Apr 20, 2021
stage2: make `@alignCast` accept 2 parameters
693dbeeef2 • Andrew Kelley • Apr 20, 2021
AstGen: implement inline asm output
4630e3891c • Andrew Kelley • Apr 20, 2021
zig astgen: print instruction counts and byte sizes
a136c093bf • Andrew Kelley • Apr 19, 2021
AstGen: implement error set decls
7f931a7522 • Andrew Kelley • Apr 19, 2021
AstGen: implement functions with inferred error sets
2083208f19 • Andrew Kelley • Apr 19, 2021
std.MultiArrayList: ensureUnusedCapacity/ensureTotalCapacity
22015c1b3b • Andrew Kelley • Apr 19, 2021
AstGen: implement if optional, if error union
27d4bea9a4 • Andrew Kelley • Apr 19, 2021
AstGen: implement while optional and while error union
3dadccec45 • Andrew Kelley • Apr 19, 2021
AstGen: implement the remaining struct init ResultLoc forms
3f60481be4 • Andrew Kelley • Apr 19, 2021
AstGen: implement all the builtin functions
ae495de54d • Andrew Kelley • Apr 19, 2021
AstGen: implement overflow arithmetic builtins
5a3045b5de • Andrew Kelley • Apr 17, 2021
AstGen: implement simple enums and decls for enums
8cf0ef2779 • Andrew Kelley • Apr 17, 2021
AstGen: fix compile error using wrong node/token function
0409d433ba • Andrew Kelley • Apr 17, 2021
stage2: make `@import` relative to the current file
e13fc6b119 • Andrew Kelley • Apr 17, 2021
AstGen: fix function decl astgen
415ef1be51 • Andrew Kelley • Apr 17, 2021
build.zig: add a way to skip installing lib/ files
dd5a1b1106 • Andrew Kelley • Apr 17, 2021
AstGen: implement global var decls
9375ad0d3b • Andrew Kelley • Apr 17, 2021
std: deprecate ensureCapacity, add two other capacity functions
c8ae581fef • Andrew Kelley • Apr 17, 2021
stage2: use import list from ZIR to queue up more AstGen tasks
5ff45b3f44 • Andrew Kelley • Apr 17, 2021
AstGen: store list of imports
a271f12a14 • Andrew Kelley • Apr 16, 2021
ZIR: rename decl_val and decl_ref to remove redundant suffix
edd75d03e3 • Andrew Kelley • Apr 16, 2021
AstGen: require `@import` operand to be string literal
adc2aed587 • Andrew Kelley • Apr 16, 2021
AstGen: put decls into blocks to be evaluated independently
333a577d73 • Andrew Kelley • Apr 16, 2021
stage2: AstGen improvements
01b4bf34ea • Andrew Kelley • Apr 16, 2021
AstGen: implement comptimeDecl, usingnamespaceDecl, testDecl
cf57e8223f • Andrew Kelley • Apr 16, 2021
AstGen: implement global variable decls
8387307807 • Andrew Kelley • Apr 16, 2021
fix new references to std.builtin that should have been std.Target
7818586a2b • Andrew Kelley • Apr 16, 2021
stage2: fix zir.zig => Zir.zig in CMakeLists.txt
f37451a63a • Andrew Kelley • Apr 16, 2021
stage2: preliminary reworking for whole-file-AstGen
3114115348 • Andrew Kelley • Apr 16, 2021
stage2: rename zir to Zir
9088d40e83 • Andrew Kelley • Apr 16, 2021
stage2: move zir.Code to become root level fields of zir.zig
0170a242bb • Andrew Kelley • Apr 16, 2021
stage2 start.zig: slight simplification
798ad631f3 • Andrew Kelley • Apr 16, 2021
stage2: implement `@bitSizeOf`
6dba9bc6fc • Andrew Kelley • Apr 16, 2021
stage2: implement comptime division
df983b30d2 • Andrew Kelley • Apr 16, 2021
stage2: implement `@sizeOf`
69645e2817 • Andrew Kelley • Apr 16, 2021