Cleaned up RISC-V instruction creation, added 32-bit immediates (#6077)
* Implemented all R-type arithmetic/logical instructions
* Implemented all I-type arithmetic/logical instructions
* Implemented all load and store instructions
* Implemented all of RV64I except FENCE
fa8935426bEleanor Bartle committed on 8/18/2020, 4:30:00 AM· committed by GitHubparent3cc1f8b