# AstGen: elide block instruction when already in empty body · gitcafe/zig

[View on GitCafe](https://git.cafe/gitcafe/zig/commit/f6abf022b790847e6145569241e4e5685abf359c)

Repository: [gitcafe/zig](https://git.cafe/gitcafe/zig)

Visibility: public

Requested revision: f6abf022b790847e6145569241e4e5685abf359c

Requested commit: f6abf022b790847e6145569241e4e5685abf359c

Commit: f6abf022b790847e6145569241e4e5685abf359c

Tree: 3058edcd61dcbe4d531c7705da8d3e0566967710

Author: mlugg

Committer: mlugg

## Message

```
AstGen: elide block instruction when already in empty body

In the code `if (cond) { ... }`, the "then body" of the `if` is
technically a block. However, we don't need to emit a real ZIR `block`
corresponding to it, because we are already within a condbr body; we
have a separate gz, and appropriate scoping for allocs and debug
variables. In this case, and many like it, we can trivially elide the
block here, instead emitting the block statements directly into the
current `GenZir`. This results in a significant decrease in ZIR bytes
for real code.

```

## Parents

- [f0a4bb6bd15b8a605e450af3359fe1622302463a](https://git.cafe/gitcafe/zig/commit/f0a4bb6bd15b8a605e450af3359fe1622302463a?format=markdown)

[Source at this commit](https://git.cafe/gitcafe/zig/tree/f6abf022b790847e6145569241e4e5685abf359c?format=markdown)