# hook up while on error unions with result locations · gitcafe/zig

[View on GitCafe](https://git.cafe/gitcafe/zig/commit/ec8d8a9774c01945dbd2c9ddf4e0f5d77e7ebbb9)

Repository: [gitcafe/zig](https://git.cafe/gitcafe/zig)

Visibility: public

Requested revision: ec8d8a9774c01945dbd2c9ddf4e0f5d77e7ebbb9

Requested commit: ec8d8a9774c01945dbd2c9ddf4e0f5d77e7ebbb9

Commit: ec8d8a9774c01945dbd2c9ddf4e0f5d77e7ebbb9

Tree: 930ef60700cefa7c8c9da1273c5a1a85968debe5

Author: Andrew Kelley

Committer: Andrew Kelley

## Message

````
hook up while on error unions with result locations

```zig
export fn entry() void {
    var c: anyerror!i32 = 1234;
    var x = while (c) |y| break foo() else |e| bar();
}
```

```llvm
define void @entry() #2 !dbg !39 {
Entry:
  %c = alloca { i16, i32 }, align 4
  %x = alloca %Foo, align 4
  %0 = bitcast { i16, i32 }* %c to i8*, !dbg !56
  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 bitcast ({ i16, i32 }* @0 to i8*), i64 8, i1 false), !dbg !56
  call void @llvm.dbg.declare(metadata { i16, i32 }* %c, metadata !43, metadata !DIExpression()), !dbg !56
  br label %WhileCond, !dbg !57

WhileCond:                                        ; preds = %Entry
  %1 = getelementptr inbounds { i16, i32 }, { i16, i32 }* %c, i32 0, i32 0, !dbg !58
  %2 = load i16, i16* %1, align 2, !dbg !58
  %3 = icmp ne i16 %2, 0, !dbg !58
  br i1 %3, label %WhileElse, label %WhileBody, !dbg !58

WhileBody:                                        ; preds = %WhileCond
  %4 = getelementptr inbounds { i16, i32 }, { i16, i32 }* %c, i32 0, i32 1, !dbg !57
  call void @llvm.dbg.declare(metadata i32* %4, metadata !50, metadata !DIExpression()), !dbg !57
  call fastcc void @foo(%Foo* sret %x), !dbg !59
  br label %WhileEnd, !dbg !60

WhileElse:                                        ; preds = %WhileCond
  %5 = getelementptr inbounds { i16, i32 }, { i16, i32 }* %c, i32 0, i32 0, !dbg !61
  call void @llvm.dbg.declare(metadata i16* %5, metadata !51, metadata !DIExpression()), !dbg !61
  call fastcc void @bar(%Foo* sret %x), !dbg !61
  br label %WhileEnd, !dbg !57

WhileEnd:                                         ; preds = %WhileElse, %WhileBody
  call void @llvm.dbg.declare(metadata %Foo* %x, metadata !52, metadata !DIExpression()), !dbg !62
  ret void, !dbg !63
}
```

````

## Parents

- [0e8b65c537c897786803e452bd054948b4b57bfe](https://git.cafe/gitcafe/zig/commit/0e8b65c537c897786803e452bd054948b4b57bfe?format=markdown)

[Source at this commit](https://git.cafe/gitcafe/zig/tree/ec8d8a9774c01945dbd2c9ddf4e0f5d77e7ebbb9?format=markdown)