# Fix PowerPC syscalls causing invalid code from CBE · gitcafe/zig

[View on GitCafe](https://git.cafe/gitcafe/zig/commit/bdca0f93c4b9527acba9a956e767be63b073280e)

Repository: [gitcafe/zig](https://git.cafe/gitcafe/zig)

Visibility: public

Requested revision: bdca0f93c4b9527acba9a956e767be63b073280e

Requested commit: bdca0f93c4b9527acba9a956e767be63b073280e

Commit: bdca0f93c4b9527acba9a956e767be63b073280e

Tree: 59391aeb67ace39209bf8e4f49dbbf469e666978

Author: taylor.fish

Committer: Alex Rønne Petersen

## Message

```
Fix PowerPC syscalls causing invalid code from CBE

Fixes #25209.

On PowerPC, some registers are both inputs to syscalls and clobbered by
them. An example is r0, which initially contains the syscall number, but
may be overwritten during execution of the syscall.

musl and glibc use a `+` (read-write) constraint to indicate this, which
isn't supported in Zig. The current implementation of PowerPC syscalls
in the Zig standard library instead lists these registers as both inputs
and clobbers, but this results in the C backend generating code that is
invalid for at least some C compilers, like GCC, which doesn't support
the specifying the same register as both an input and a clobber.

This PR changes the PowerPC syscall functions to list such registers as
inputs and outputs rather than inputs and clobbers. Thanks to jacobly0
who pointed out that it's possible to have multiple outputs; I had
gotten the wrong idea from the documentation.

```

## Parents

- [ba137783ed4152ebe8d7b98dca855c551fc924a7](https://git.cafe/gitcafe/zig/commit/ba137783ed4152ebe8d7b98dca855c551fc924a7?format=markdown)

[Source at this commit](https://git.cafe/gitcafe/zig/tree/bdca0f93c4b9527acba9a956e767be63b073280e?format=markdown)