# stage2: implement \`@atomicRmw\` and \`@atomicLoad\` · gitcafe/zig

[View on GitCafe](https://git.cafe/gitcafe/zig/commit/b67d1810be3234c363ee2929ffcc91083bfb0ae5)

Repository: [gitcafe/zig](https://git.cafe/gitcafe/zig)

Visibility: public

Requested revision: b67d1810be3234c363ee2929ffcc91083bfb0ae5

Requested commit: b67d1810be3234c363ee2929ffcc91083bfb0ae5

Commit: b67d1810be3234c363ee2929ffcc91083bfb0ae5

Tree: c4fda56637928dc68069dcdd28411d37cafd721b

Author: Andrew Kelley

Committer: Andrew Kelley

## Message

```
stage2: implement `@atomicRmw` and `@atomicLoad`

 * langref: add some more "see also" links for atomics
 * Add the following AIR instructions
   - atomic_load
   - atomic_store_unordered
   - atomic_store_monotonic
   - atomic_store_release
   - atomic_store_seq_cst
   - atomic_rmw
 * Implement those AIR instructions in LLVM and C backends.
 * AstGen: make the `ty` result locations for `@atomicRmw`, `@atomicLoad`,
   and `@atomicStore` be `coerced_ty` to avoid unnecessary ZIR
   instructions when Sema will be doing the coercions redundantly.
 * Sema for `@atomicLoad` and `@atomicRmw` is done, however Sema for
   `@atomicStore` is not yet implemented.
   - comptime eval for `@atomicRmw` is not yet implemented.
 * Sema: flesh out `coerceInMemoryAllowed` a little bit more. It can now
   handle pointers.

```

## Parents

- [f83a4b444c4c2fca7086fe6dbdaccc7b6d8f35ca](https://git.cafe/gitcafe/zig/commit/f83a4b444c4c2fca7086fe6dbdaccc7b6d8f35ca?format=markdown)

[Source at this commit](https://git.cafe/gitcafe/zig/tree/b67d1810be3234c363ee2929ffcc91083bfb0ae5?format=markdown)
