# compiler-rt: Separate max size allowed for load/store and CAS · gitcafe/zig

[View on GitCafe](https://git.cafe/gitcafe/zig/commit/a0b73c9f02b3bb9e550d0283053cc9fc6c1dade6)

Repository: [gitcafe/zig](https://git.cafe/gitcafe/zig)

Visibility: public

Requested revision: a0b73c9f02b3bb9e550d0283053cc9fc6c1dade6

Requested commit: a0b73c9f02b3bb9e550d0283053cc9fc6c1dade6

Commit: a0b73c9f02b3bb9e550d0283053cc9fc6c1dade6

Tree: be500d4059b340ba39e48f648f76bc2c29ca4c1a

Author: LemonBoy

Committer: Andrew Kelley

## Message

```
compiler-rt: Separate max size allowed for load/store and CAS

The v6m ISA has no way to express a CAS loop natively without turning
off the interrupts or using the kernel cmpxchg harness.

On such a platform the user has to provide a few __sync_* builtins to
satisfy the linker.

```

## Parents

- [c5ced0d74a40c8a8a46bf1b65ece17479384ce7c](https://git.cafe/gitcafe/zig/commit/c5ced0d74a40c8a8a46bf1b65ece17479384ce7c?format=markdown)

[Source at this commit](https://git.cafe/gitcafe/zig/tree/a0b73c9f02b3bb9e550d0283053cc9fc6c1dade6?format=markdown)