# stage2: add zero\- and sign-extend moves to x86_64 · gitcafe/zig

[View on GitCafe](https://git.cafe/gitcafe/zig/commit/9f224ebd9a4f26d0dc5b0937d3d5df8fe78f1c9d)

Repository: [gitcafe/zig](https://git.cafe/gitcafe/zig)

Visibility: public

Requested revision: 9f224ebd9a4f26d0dc5b0937d3d5df8fe78f1c9d

Requested commit: 9f224ebd9a4f26d0dc5b0937d3d5df8fe78f1c9d

Commit: 9f224ebd9a4f26d0dc5b0937d3d5df8fe78f1c9d

Tree: e3bbcb01c6c19953004d0a28efc789a5015e9f4a

Author: Jakub Konka

Committer: Jakub Konka

## Message

```
stage2: add zero- and sign-extend moves to x86_64

* remove `LoweringError` error set from `Emit.zig` - it actually
  was less than helpful; it's better to either not throw an error
  since there can be instructions with mismatching operand sizes
  such as `movsx` or assert on a by instruction-basis. Currently,
  let's just pass through and see how we fare.
* when moving integers into registers, check for signedness and move
  with zero- or sign-extension if source operand is smaller than 8
  bytes. The destination operand is always assumed to be full-width,
  i.e., 8 bytes.
* clean up `airTrunc` a little to match the rest of CodeGen inst
  implementations.

```

## Parents

- [075e2eaaafb1038ce623713d9dc4947171d5c255](https://git.cafe/gitcafe/zig/commit/075e2eaaafb1038ce623713d9dc4947171d5c255?format=markdown)

[Source at this commit](https://git.cafe/gitcafe/zig/tree/9f224ebd9a4f26d0dc5b0937d3d5df8fe78f1c9d?format=markdown)