# stage2 ARM: Introduce MCValue.cpsr_flags · gitcafe/zig

[View on GitCafe](https://git.cafe/gitcafe/zig/commit/9747303d16dfca61316a292d1e05ac901191e3a3)

Repository: [gitcafe/zig](https://git.cafe/gitcafe/zig)

Visibility: public

Requested revision: 9747303d16dfca61316a292d1e05ac901191e3a3

Requested commit: 9747303d16dfca61316a292d1e05ac901191e3a3

Commit: 9747303d16dfca61316a292d1e05ac901191e3a3

Tree: a2375efaac6a04c5eb43d6bbf09bf8d633ce8d2a

Author: joachimschmidt557

Committer: Joachim Schmidt

## Message

```
stage2 ARM: Introduce MCValue.cpsr_flags

MCValue.cpsr_flags replaces
MCValue.compare_flags_{signed,unsigned}. This simplifies a lot of
stuff and enables an MCValue to represent only the overflow bits in
the CPU (previously, it was only possible to represent a register +
the overflow bits).

```

## Parents

- [1f5b0c11563d9ee0a284b708c7ca092da0a0b9ef](https://git.cafe/gitcafe/zig/commit/1f5b0c11563d9ee0a284b708c7ca092da0a0b9ef?format=markdown)

[Source at this commit](https://git.cafe/gitcafe/zig/tree/9747303d16dfca61316a292d1e05ac901191e3a3?format=markdown)