# stage2: Default AVR generic cpu to avr2 · gitcafe/zig

[View on GitCafe](https://git.cafe/gitcafe/zig/commit/89df41e5d859fcd53863c9f707e8c697b794148c)

Repository: [gitcafe/zig](https://git.cafe/gitcafe/zig)

Visibility: public

Requested revision: 89df41e5d859fcd53863c9f707e8c697b794148c

Requested commit: 89df41e5d859fcd53863c9f707e8c697b794148c

Commit: 89df41e5d859fcd53863c9f707e8c697b794148c

Tree: 81e9ca43a572041e84d1311d127c6df2f58b35db

Author: LemonBoy

Committer: Andrew Kelley

## Message

```
stage2: Default AVR generic cpu to avr2

The avr1 target is a very minimal subset of the AVR ISA, quoting the GCC
manual:

> This ISA is implemented by the minimal AVR core and supported for
> assembler only.

Default to avr2 as GCC and Clang do.

```

## Parents

- [2bfc6d14d500dcaf66b8ee7d24637e25e3795a5e](https://git.cafe/gitcafe/zig/commit/2bfc6d14d500dcaf66b8ee7d24637e25e3795a5e?format=markdown)

[Source at this commit](https://git.cafe/gitcafe/zig/tree/89df41e5d859fcd53863c9f707e8c697b794148c?format=markdown)