# stage2 ARM: fix register allocation in genArmBinOp · gitcafe/zig

[View on GitCafe](https://git.cafe/gitcafe/zig/commit/6a5a6386c60143258fc9970f52e26e3a974b52b5)

Repository: [gitcafe/zig](https://git.cafe/gitcafe/zig)

Visibility: public

Requested revision: 6a5a6386c60143258fc9970f52e26e3a974b52b5

Requested commit: 6a5a6386c60143258fc9970f52e26e3a974b52b5

Commit: 6a5a6386c60143258fc9970f52e26e3a974b52b5

Tree: 6419bf13417fc9394f13df4031f7c55aefddc460

Author: joachimschmidt557

Committer: Jakub Konka

## Message

```
stage2 ARM: fix register allocation in genArmBinOp

Previously, this would reuse an operand even if reuseOperand returned
false for both operands.

genArmBinOpCode was also changed to be more Three-address code oriented
in the process.

```

## Parents

- [c2beaba85a87b5985fe9f1676ad2bc4888dd6c1a](https://git.cafe/gitcafe/zig/commit/c2beaba85a87b5985fe9f1676ad2bc4888dd6c1a?format=markdown)

[Source at this commit](https://git.cafe/gitcafe/zig/tree/6a5a6386c60143258fc9970f52e26e3a974b52b5?format=markdown)