riscv: reorganize `binOp` and implement `cmp_imm_gte` MIR

this was an annoying one to do, as there is no (to my knowledge) myriad sequence
that will allow us to do `gte` compares with an immediate without allocating a register.
RISC-V provides a single instruction to do compares, that being `lt`, and so you need to
use more than one for other variants, but in this case, i believe you need to allocate a register.
5e010b6deaDavid Rubin committed on 5/11/2024, 9:17:11 AMparent63bbf66
3 files changedLine totals unavailable