# stage1: Let LLVM legalize the overflowing ops on vectors ยท gitcafe/zig [View on GitCafe](https://git.cafe/gitcafe/zig/commit/1ac512df70465629d1e80ff02be51c121c6f4c07) Repository: [gitcafe/zig](https://git.cafe/gitcafe/zig) Visibility: public Requested revision: 1ac512df70465629d1e80ff02be51c121c6f4c07 Requested commit: 1ac512df70465629d1e80ff02be51c121c6f4c07 Commit: 1ac512df70465629d1e80ff02be51c121c6f4c07 Tree: 43383b496614c246dd2c38544493e9ee2368c7a6 Author: LemonBoy Committer: Andrew Kelley ## Message ```` stage1: Let LLVM legalize the overflowing ops on vectors LLVM is smart enough to produce tight overflow checking sequences. On x86_64 a simple v4u32 addition is turned from: ``` c5 e9 d4 d4 vpaddq %xmm4, %xmm2, %xmm2 c5 f1 d4 cb vpaddq %xmm3, %xmm1, %xmm1 c5 f8 28 e9 vmovaps %xmm1, %xmm5 c4 e3 55 18 ea 01 vinsertf128 $1, %xmm2, %ymm5, %ymm5 c5 f0 c6 da 88 vshufps $136, %xmm2, %xmm1, %xmm3 c5 c8 57 f6 vxorps %xmm6, %xmm6, %xmm6 c4 e3 55 0c ee aa vblendps $170, %ymm6, %ymm5, %ymm5 c4 e3 7d 19 ec 01 vextractf128 $1, %ymm5, %xmm4 c4 e2 69 29 d4 vpcmpeqq %xmm4, %xmm2, %xmm2 c5 e9 ef d0 vpxor %xmm0, %xmm2, %xmm2 c4 e2 71 29 cd vpcmpeqq %xmm5, %xmm1, %xmm1 c5 f1 ef c0 vpxor %xmm0, %xmm1, %xmm0 c5 f9 6b c2 vpackssdw %xmm2, %xmm0, %xmm0 c5 f8 50 c0 vmovmskps %xmm0, %eax 84 c0 testb %al, %al ``` into: ``` c5 f9 fe c9 vpaddd %xmm1, %xmm0, %xmm1 c4 e2 71 3f c0 vpmaxud %xmm0, %xmm1, %xmm0 c5 f1 76 c0 vpcmpeqd %xmm0, %xmm1, %xmm0 c5 f8 50 c0 vmovmskps %xmm0, %eax 34 0f xorb $15, %al 0f 95 c1 setne %cl f6 c1 01 testb $1, %cl ``` ```` ## Parents - [8f1408578cb255fbbdc555d746b25cefb331105e](https://git.cafe/gitcafe/zig/commit/8f1408578cb255fbbdc555d746b25cefb331105e?format=markdown) [Source at this commit](https://git.cafe/gitcafe/zig/tree/1ac512df70465629d1e80ff02be51c121c6f4c07?format=markdown)